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Some MOS transistor models for computer-aided design, each having a given accuracy and complexity, are presented. These models apply before saturation and in the saturation region. Before saturation, the proposed theory takes into account the behavior of mobility versus gate-channel and drain-source biases. In the saturation region the effect of mobile carriers on the drain-channel space-charge layer in an approximate two-dimensional analysis is taken into account. This model has been checked for dc characteristics and different channel lengths, dynamic resistances in the saturation region, transfer characteristics of various inverters, and dynamic response of these circuits. The accuracy is within 5 percent.