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ASPRO: An asynchronous 16-bit RISC microprocessor with DSP capabilities

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3 Author(s)
Renaudin, M. ; TIMA - INPG, Grenoble, France ; Vivet, P. ; Robin, F.

This paper describes a CMOS standard-cell Quasi-Delay-Insensitive (QDI) 16-bit asynchronous micro-processor. ASPRO is a scalar microprocessor which issues instructions in-order and completes their execution out-of-order. Designed for embedded applications, it can be customized both at the hardware and software levels to fit specific application requirements. To demonstrate this feature the prototype includes a multiplier-accumulator unit. Fabricated using the STMicroelectronics 0.25µm, 5 metal layers CMOS technology, ASPRO revealed functional at first silicon, and runs at 140 peak MIPS. This project demonstrates that the methodology and the asynchronous logic are mature to design complex and fast fully asynchronous circuits.

Published in:

Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European

Date of Conference:

21-23 Sept. 1999