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High speed capacitive coupled interface for multipoint connections

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5 Author(s)
Schmidt, A. ; Universitaet der Bundeswehr Muenchen, Neubiberg ; Hoffman, K. ; Kowarik, O. ; Pfeiffer, R.
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A capacitivly coupled interface for a bidirectional data bus like a Controller-DRAM-bus with data transfer rates up to 1Gb/s at a power supply voltage of 1.5V is presented. All receivers are capacitively coupled to the data bus. The CMOS receiver consumes 1.65mW DC-power in a 0.35µm technology. The computed power consumption of the driver for a bus with five I/Os is reduced approximatly to 1/4 and to 1/8 in comparison with a SSTL (Stub Series Terminated Logic) system and a RSL (Rambus Signaling Logic) system at a transfer rate of 1Gb/s respectively.

Published in:

Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European

Date of Conference:

21-23 Sept. 1999