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This paper describes a newly developed monitoring scheme for minimizing power consumption by means of supply voltage VDD and threshold voltage VTH dynamic control in active and standby modes. In the active mode, on the basis of delay monitoring results, either VDD control or VTH control is selected to avoid any oscillation problem between them. Switching current ISW and leakage current ILEAK are monitored, and VTH is adjusted so as to maintain that ratio known to indicate minimum power consumption. In the standby mode, the precision of optimum body bias monitoring is improved by taking into consideration the effects of lowered VDD and gate-oxide leakage current. Experimental results with a 90-nm CMOS device indicate that the proposed scheme results in successful ISW/ILEAK ratio maintenance and successful detection of optimum body bias conditions (IOFF = ISUB (= GIDL + IGB)) to within 20% of actual minimum leakage current values.