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A 95mW MPEG2 MP@HL motion estimation processor core for portable high resolution video application

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6 Author(s)
Murachi, Y. ; Fac. of Eng., Kanazawa Univ., Ishikawa, Japan ; Matsuno, T. ; Hamano, K. ; Miyakoshi, J.
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This paper describes a 95mW MPEG2 MP@HL motion estimation processor core for portable and high resolution video application like an HD camcorder. It features a novel hierarchical algorithm and a low power ring-connected systolic array architecture. It supports the frame/field and bi-directional prediction with half-pel precision for 1920×1080@30fps resolution video. The search range is ±128×±64. The ME core integrates 2.25M transistors in 3.1mm×3.1mm using 0.18micron technology.

Published in:

VLSI Circuits, 2005. Digest of Technical Papers. 2005 Symposium on

Date of Conference:

16-18 June 2005