Accurate nonlinear transistor modeling using pulsed S parameters measurements under pulsed bias conditions

An improved method for accurate nonlinear modeling of transistors is proposed. It makes it possible to overcome the drawbacks of the methods generally used. It is based on pulsed S parameter measurements under pulsed bias conditions. This procedure takes into account dynamical variations without varying the temperature of the device under test. The method has been used successfully with FET transistors and may be extended to very-high-power bipolar transistors used in pulse (class C) radar applications.<
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