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Mobility and CMOS devices/circuits on sub-10nm [110] ultra thin body SOI

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18 Author(s)
Hulling Shang ; Res. Div., IBM Semicond. R&D Center, New York, NY, USA ; Rubino, J. ; Doris, B. ; Topol, A.
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For the first time, we show the experimental inversion mobility data on ultra thin [110] SOI substrates for thickness as thin as 6nm. Both electron and hole mobility in ultra thin [110] SOI are evaluated as a function of SOI thickness. In addition, novel processes such as [110] selective epitaxy and extremely thin cobalt disilicide CoSi2 are developed. Ring oscillators and SRAM cell are demonstrated for the first time on 6nm [110] ultra thin SOI. When compared to ultra thin SOI in (100) substrate, we observe ∼33% drive current enhancement in PFETs at Lg=50nm and ∼1.8X hole mobility enhancement.

Published in:

VLSI Technology, 2005. Digest of Technical Papers. 2005 Symposium on

Date of Conference:

14-16 June 2005