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HART, a heterogeneous architecture for real-time image processing

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2 Author(s)
J. Goodenough ; Sheffield Univ., UK ; N. L. Seed

Today, real-time image processing hardware primarily takes the form of a high speed front end accelerator, targetted toward iconic and intermediate level algorithmic tasks. Examples of contemporary commercial systems are: Datacube, Maxtor and, Data Translation (for PC); Microsystem Mainboard, and Analogic (for VME). These are supported by a range of software environments, such as Visilog or Semper, which permit pre-defined library routines to be executed in a user friendly environment. In some cases, the hardware supports complex operations ranging from morphological operators to stereo vision algorithms. Whilst addressing a required market niche and pushing image processing into real applications, these products are inherently limited by the host machine's processing power and the interconnection topology adopted within the hardware itself. The authors describe a new architecture which is designed to address these problems and evolve to match the requirements of dynamic scene analysis and understanding

Published in:

Image Processing and its Applications, 1992., International Conference on

Date of Conference:

7-9 Apr 1992