By Topic

A novel P-channel nitride-trapping nonvolatile memory device with excellent reliability properties

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Hang-Ting Lue ; Emerging Central Lab., Macronix Int. Co., Hsinchu, Taiwan ; Kuang-Yeu Hsieh ; R. Liu ; Chih-Yuan Lu

A novel P-channel nitride trapping nonvolatile memory device is studied. The device uses a P+-poly gate to reduce gate injection during channel erase, and a relatively thick tunnel oxide (>5 nm) to prevent charge loss. The programming is carried out by low-power band-to-band tunneling induced hot-electron (BTBTHE) injection. For the erase, self-convergent channel erase is used to expel the electrons out of nitride. Experimental results show that this p-channel device is immune to read disturb due to the large potential barrier for hole tunneling. Excellent P/E cycling endurance and retention properties are demonstrated. This p-channel device shows potential for high-density NAND-type array application with high-programming throughput (>10 Mb/sec).

Published in:

IEEE Electron Device Letters  (Volume:26 ,  Issue: 8 )