By Topic

Design of multiprocessor systems for concurrent error detection and fault diagnosis

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Vinnakota, B. ; Dept. of Electr. Eng., Princeton Univ., NJ, USA ; Jha, N.K.

Results on the design of systems using algorithm-based fault tolerance (ABFT), a low-overhead fault tolerance scheme for high-speed parallel processing systems, are presented. Bounds on the diagnosability of the system and the number of checks needed to design a unit system of given capability are derived. A procedure for forming the target fault-tolerant system from the unit system is introduced. The procedure is applicable to a wide range of systems in which processors may share data elements. The applications of the design scheme are illustrated through examples.<>

Published in:

Fault-Tolerant Computing, 1991. FTCS-21. Digest of Papers., Twenty-First International Symposium

Date of Conference:

25-27 June 1991