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In this work, we developed a highly memory-efficient, accurate table model that is 10×+ faster than its analytical counterparts: BSIM3/4 models. Speed derives from linear interpolation; accuracy and memory efficiency result from the unstructured grid founded on a BSP tree for discretizing the device function space. We also describe a methodology invoked during table generation to overcome the non-monotonic device behavior that results from interpolating the unstructured grid; the method preserves both continuity and monotonicity of the device quantities. These table models are now implemented in our production circuit simulator, TISpice. Overall speedups of 1.8× to 4.8× were observed on suites of industry circuits.
Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific (Volume:2 )
Date of Conference: 18-21 Jan. 2005