Fast, accurate MOS table model for circuit simulation using an unstructured grid and preserving monotonicity

In this work, we developed a highly memory-efficient, accurate table model that is 10/spl times/+ faster than its analytical counterparts: BSIM3/4 models. Speed derives from linear interpolation; accuracy and memory efficiency result from the unstructured grid founded on a BSP tree for discretizing the device function space. We also describe a methodology invoked during table generation to overcome the non-monotonic device behavior that results from interpolating the unstructured grid; the method preserves both continuity and monotonicity of the device quantities. These table models are now implemented in our production circuit simulator, TISpice. Overall speedups of 1.8/spl times/ to 4.8/spl times/ were observed on suites of industry circuits.