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This paper presents a novel architecture of register files that combines the local register files and the global register file for clustered VLIW (very long instruction word) processors. The communication between function units through global register file will be more efficient. The concept of associate register is introduced for this architecture. This makes it possible to write a result to two destination registers in one operation, which can efficiently speed up the software pipelining.
Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific (Volume:1 )
Date of Conference: 18-21 Jan. 2005