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A novel approach of self-powered CMOS active pixel sensors (SPS) for ultra low-power applications is presented. The SPS architecture allows generation of electric power by employing a light sensitive device, located on the same silicon die as the active pixel sensor (APS). While providing the energy required for the pixel and signal readout circuit operation, the SPS enables power dissipation reduction from the conventional power supply. This makes the SPS architecture very useful in applications where ultra low-power is the main demand. A detailed analysis of the proposed structure is carried out, with respect to power dissipation requirements, sensor area and power generation efficiency, showing the advantages and drawbacks of the SPS architecture. An illustrative example of an SPS structure in a 0.35 μm standard CMOS technology is discussed and a test chip design, implemented in advanced 0.18 μm standard CMOS technology, is presented.