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New graph transformation schemes in graph-based memory allocation method for an indirect addressing DSP

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3 Author(s)
Sugino, N. ; Dept. of Adv. Appl. Electron., Tokyo Inst. of Technol., Yokohama, Japan ; Matsuura, T. ; Nishihara, A.

For indirect addressing DSPs, a novel memory address allocation method based on graph representation is presented. The method translates a given memory access sequence into a graph notation, and transforms it into line-shaped graphs. At the transformation, a cost evaluation measure is newly introduced, so that efficient memory allocation is given. The proposed cost functions are applied to the existing memory allocation method, and memory allocation results derived for several examples show its effectiveness.

Published in:

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Date of Conference:

23-26 May 2005