By Topic

A 10-bit 400-MS/s 170 mW 4-times interleaved A/D converter in 0.35-μm BiCMOS

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Riikonen, J. ; Electron. Circuit Design Lab., Helsinki Univ. of Technol., Finland ; Aho, M. ; Hakkarainen, V. ; Halonen, K.
more authors

A time-interleaved four-channel pipeline analog-to-digital converter is presented. The A/D converter utilizes a double-sampling, low power, high speed operational amplifier. The maximum sample rate of the converter is 400 MS/s. With a 3.3 V supply voltage, a power consumption of 170 mW is achieved. The circuit is designed with a 0.35 μm BiCMOS process and for a full-scale 147.7 MHz input the spurious-free-dynamic-range is 47.8 dB.

Published in:

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Date of Conference:

23-26 May 2005