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A novel matched filter (MF) design based on the charge-domain operation is described. To investigate the charge transfer characteristics and operations of correlator circuits that comprise the MF, prototype designs are made by standard CMOS and fabricated by the MOSIS 1.5-μm overlapping double-poly and double-metal technology. The power consumption of the fabricated design was 0.18 pJ/sample/tap. This value is 1/25 of that of the current state of the art switched capacitor MF design by 0.35-μm technology. The circuit area was 0.151 mm2/tap. The correlator circuit of the new MF is composed by several steps of charge transfer operations. Hence, no special fabrication process such as those used for CCD imagers is required. The detailed structure and operation of the correlator is explained.
Date of Conference: 23-26 May 2005