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A two-step DDEM ADC for accurate and cost-effective DAC testing

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3 Author(s)
Hanqing Xing ; Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA ; Degang Chen ; Geiger, R.

This paper presents a scheme for testing DAC static nonlinearity errors by using a two-step flash ADC with deterministic dynamic element matching (DDEM). In this work, the structure of the two-step ADC, the switching strategy of DDEM, and the DAC test algorithm are discussed. The performance of the proposed approach is validated by using numerical simulation. Simulation results show that a low accuracy two-step ADC with an 8-bit coarse stage and a 6-bit fine stage is capable of testing a 14-bit DAC to 1-LSB accuracy by using the proposed DDEM strategy. This test approach has potential for built-in self-test (BIST) of precision DAC because of the low requirement on ADC performance and the simple element matching strategy.

Published in:

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Date of Conference:

23-26 May 2005