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A one-quadrant discrete-time cellular neural network architecture for pixel-level snakes: B/W processing

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5 Author(s)
Brea, V.M. ; Dept. of Electron. & Comput. Sci., Santiago de Compostela Univ., Spain ; Laiho, M. ; Vilarino, D.L. ; Paasio, A.
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This paper introduces a one-quadrant discrete-time cellular neural network architecture for the pixel-level snakes, an active-contour-based technique. The motivation behind such an architecture is to have a subsequent on-chip implementation with better figures of merit, especially area consumption and processing speed. The current paper goes through the B/W operations performed in the pixel-level snake algorithm.

Published in:
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Date of Conference: 23-26 May 2005

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