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An arbitration look-ahead scheme for reducing end-to-end latency in networks on chip

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4 Author(s)
Kwanho Kim ; Dept. of Electr. Eng., KAIST, Daejeon, South Korea ; Se-Joong Lee ; Kangmin Lee ; Hoi-Jun Yoo

With the increasing complexity of system-on-chips, networks on chip (NoC) using multi-hop switching require low end-to-end latency for QoS guarantees. An arbitration look-ahead scheme is proposed to reduce the end-to-end packet latency in the NoC. Its packet arbitration at each switch is completed a few cycles in advance of the packet arrival. As a result, a packet bypasses the switch without the latency of input queuing and arbitration. This scheme is analyzed on a 4×4 mesh topology. A maximum 65% and average 26% latency reduction are obtained under random traffic. Latency reduction up to 36% is achieved under multimedia traffic.

Published in:

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Date of Conference:

23-26 May 2005

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