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On VLSI decompositions for d-ary de Bruijn graphs (extended abstract)

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4 Author(s)
T. Yamada ; Dept. of Inf. & Comput. Sci., Saitama Univ., Japan ; H. Kawakita ; T. Nishiyama ; S. Ueno

A VLSI decomposition of a graph G is a collection of isomorphic vertex-disjoint subgraphs (called building blocks) of G which together span G. The efficiency of a VLSI decomposition is the fraction of the edges of G which are present in the subgraphs. The paper gives a necessary condition and a sufficient condition for a graph to be a building block for d-ary de Bruijn graphs. We also show building blocks for d-ary de Bruijn graphs with asymptotically optimal efficiency. Furthermore, we list the most efficient universal d-ary de Bruijn building blocks we know of.

Published in:

2005 IEEE International Symposium on Circuits and Systems

Date of Conference:

23-26 May 2005