Analytical crosstalk noise and its induced-delay estimation for distributed RLC interconnects under ramp excitation

As feature sizes are decreased to deep submicrometer dimensions, the on-chip interconnect is best modelled as a distributed RLC line. However, unlike the RC model, such a model increases the complexity of interconnect crosstalk noise and its induced-delay estimation, due to the line's non-monotonic characteristic. We present a closed-form analytical delay calculation approach for distributed-coupled RLC interconnect lines that addresses the shortcomings of past RC and lumped RLC interconnect models, significantly improving their accuracy for deep submicron (DSM) designs.