Referenced Items are not available for this document.
This technical letter reports the development of a novel design for a sequential network in order to facilitate the single stuck-at fault detection problem. This has been achieved by the use of AND, OR, and NOT logic gates and by inserting additional observed outputs.
Published in:
Proceedings of the IEEE
(Volume:75
,
Issue:
7
)
Date of Publication: July 1987
- Page(s):
- 971 - 972
- ISSN :
- 0018-9219
- Digital Object Identifier :
- 10.1109/PROC.1987.13836
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 28 June 2005
- Issue Date :
- July 1987
- Sponsored by :
- IEEE
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