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Process modeling of integrated circuit device technology

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2 Author(s)
Dutton, R.W. ; Stanford University, Stanford, CA ; Hansen, S.E.

This paper reviews the field of computer-aided design as applied to process modeling of integrated circuit technology and devices. Device design applications for process modeling are considered for both bipolar and NMOS technologies. The kinetics of oxidation and impurity diffusion in silicon are discussed. The numerical solution of impurity diffusion is considered, including grid and time step constraints. New efforts in two-dimensional process modeling are briefly discussed along with test structure work needed for parameter estimation.

Published in:

Proceedings of the IEEE  (Volume:69 ,  Issue: 10 )