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Design and implementation of a floating-point quasi-systolic general purpose CORDIC rotator for high-rate parallel data and signal processing

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2 Author(s)
A. A. J. de Lange ; Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands ; E. F. Deprettere

The authors describe the design and implementation of an algorithm and a processor which can be used to accelerate computations in which large amounts of rotations (circular as well as hyperbolic) are involved. The processor is a low-cost high-throughput VLSI implementation of the algorithm. With 107 rotations per second, many real-time and interaction-time applications in scientific computation become feasible. The required storage and/or silicon area is low and the execution time is independent of the particular operation performed. Another feature of this CORDIC design is its pipelined architecture and floating point extension. It is angle-pipelinable at the bit-level and has an execution time which is independent of any possible operation that can be executed

Published in:

Computer Arithmetic, 1991. Proceedings., 10th IEEE Symposium on

Date of Conference:

26-28 Jun 1991