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Phase-locked loops (PLLs) are designed to extract timing signals in telecommunication networks. Noise, cross-talk, inter-symbol interference, quantization noise, and signal distortion are responsible for oscillations in the time between two successive transitions of the clock or data signal. It appears as an accidental phase modulation superposed to the original signal. This phenomenon is called timing jitter and affects the integrity of the data recovering process and, as a consequence, the error bit rate is increased. This problem has been studied by treating the jitter as a band limited noise process and tolerance masks for the jitter amplitude and frequency are recommended for several network architectures. Here, we develop a simple model with the continuous phase deviations of the clock signals considered as periodic signals in the band of the real disturbances. Comparisons with the stochastic approach are presented.
Circuits and Systems II: Express Briefs, IEEE Transactions on (Volume:52 , Issue: 6 )
Date of Publication: June 2005