Referenced Items are not available for this document.
GaAs MESFETs were fabricated using a low-temperature-grown (LTG) high-resistivity GaAs layer to passivate the doped channel between the gate and source and between the gate and the drain. The gate was fabricated such that the source and drain edges of the metal gate overlapped the LTG GaAs passivation layer. The electric fields at the edges of the gate were reduced by this special combination of LTG GaAs passivation and gate geometry, resulting in a gate-drain breakdown voltage of 42 V. This value is over 60% higher than that of similar MESFETs fabricated without the gate overlap.<
Published in:
Electron Device Letters, IEEE
(Volume:13
,
Issue:
6
)
Date of Publication: June 1992
- Page(s):
- 335 - 337
- ISSN :
- 0741-3106
- INSPEC Accession Number:
- 4196206
- Digital Object Identifier :
- 10.1109/55.145076
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- June 1992
- Sponsored by :
- IEEE Electron Devices Society
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