By Topic

Frequency of switching per clock pulse in large digital systems

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Shih-Mei Cheng ; Florida A&M Univ., Tallahassee, Fla.

A statistical method is used to find the worst case number of switchings per clock pulse of large digital integrated circuits containing n gates to be 2.12√n. This result is useful in designing decoupling capacitors and in measuring the interference generated.

Published in:

Proceedings of the IEEE  (Volume:59 ,  Issue: 12 )