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A high-speed FFT unit based on a low cost digital signal processor

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2 Author(s)
Tortoli, P. ; Dept. of Electron. Eng., Florence Univ., Italy ; Andreuccetti, F.

The implementation of a high-speed 128-complex-point FFT (fast Fourier transform) system is described. It is based on a low-cost programmable NMOS digital signal processor (DSP) with a limited amount of memory. For this reason, its use has been restricted so far, to short transforms (Nor=128), performed at a lower speed. This inherent compromise has been overcome by subsequently calculating eight length-16 and sixteen length-8 FFTs, so that a limited data memory is occupied at each processing step. Moreover, the iteration of basics short transform subroutines allows sizable reduction of the requested program memory without sacrificing the processing speed. As a result, by using a single DSP in a simple architecture, 128 complex points are analyzed at a throughput rate of several tens of kilohertz. The possible application of the approach to larger FFTs, as well as to other transforms, is discussed. A brief description is also given of how a higher operating speed could be obtained by pipelining the FFT unit without having recourse to expensive devices.<>

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Circuits and Systems, IEEE Transactions on  (Volume:35 ,  Issue: 11 )