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System-on-package (SOP) continues to revolutionize the realization of convergent systems in microelectronics packaging. The SOP concept which began at the Packaging Research Center (PRC) at Georgia Tech has benefited its international collaborative partners in education including the Indian Institute of Science (IISc). The academic program for electronics packaging currently in the Centre for Electronics Design and Technology (CEDT) at IISc is aimed at educating a new breed of globally-competitive engineers in the new SOP technology to meet the next generation workforce need of global as well as the Indian electronics industry. This has been possible with the hands-on electronics packaging course being taught at IISc. The first-ever fundamental systems packaging textbook from the PRC, and in which IISc has been a partner has brought awareness among the engineering students as to the need for better packaging in electronic products and systems. This paper will highlight the electronics packaging scenario in India, the first-of-its-kind electronics packaging course curriculum in CEDT at the IISc, explain the benefits of research integration with education and look at how SOP technology and packaging education has helped to enrich the engineering students at the graduate level.