An Si Schottky diode demultiplexer circuit for high bit-rate optical receivers

We demonstrate an Si Schottky diode sampling demultiplexer circuit for an optical receiver. A system model and the operation principle of the sampling demultiplexer are described. The Si Schottky diode sampling circuit has been realized in conductor-backed coplanar waveguide technology and fabricated in thin-film technology. The sampling circuit module was measured using a 43-Gb/s nonreturn-to-zero signal. In addition, for the purpose of reducing the intersymbol interference, a linear tapped delay-line equalizer circuit has been designed and simulated. The weight of the taps has been calculated employing a zero-forcing algorithm.