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Nonlinearity correction for multibit ΔΣ DACs

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9 Author(s)
Arias, J. ; Dept. de Electr. y Electron., Univ. de Valladolid, Spain ; Kiss, P. ; Boccuzzi, V. ; Quintanilla, L.
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This paper presents a digital correction technique for wide-band multibit error-feedback (EF) digital-to-analog converters (DACs). The integral nonlinearity (INL) error of the multibit DAC is estimated (on line or off line) by a calibration analog-to-digital converter (CADC) and stored in a random-access memory table. The INL values are then used to compensate for the multibit DAC's distortion by a simple digital addition. The accuracy requirements for the error estimates are derived. These requirements can be significantly relaxed when the correction is combined with data-weighted averaging (DWA). Simulation and discrete-component measurement results are presented for a fourth-order 5-bit EF DAC. The results show a 14-bit DAC operating at an oversampling ratio of 8, which is suitable for digital subscriber line applications. The correction uses simple digital circuitry and a 3-bit CADC enhanced by DWA.

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Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:52 ,  Issue: 6 )