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Two-dimensional multirate systolic array design for artificial neural networks

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2 Author(s)
Khan, E.R. ; Nat. Semicond., Santa Clara, CA, USA ; Nam Ling

In this paper a novel design of neural networks using 2-dimensional systolic array is proposed. Two techniques are applied in the design, namely, 2-dimensional pipelining and multirate processing (2 level clocking). 2-dimensional pipelining operation gives significant improvement in computation time compared to the currently known 1D and 2D systolic implementation schemes. Besides, multirate clocking is used so that weights (synapses) can be transmitted and passed systolically in a rate much higher than activation voltages, to achieve maximum array throughput and to eliminate global interconnections present in many array (including systolic) designs (thus reducing synchronization and propagation delay problems). This scheme of passing weights also saves area significantly since local storage area for the weights can be reduced. The design is applied to the implementation of a Hopfield neural net

Published in:

VLSI, 1991. Proceedings., First Great Lakes Symposium on

Date of Conference:

1-2 Mar 1991