Skip to Main Content
A six-layer process is described for the fabrication of Josephson junction devices and Superconducting QUantum Interference Devices (SQUIDs) on silicon wafers up to 150 mm in diameter. The Nb/Al-AlOx/Nb trilayers are sputter-deposited in a load-locked vacuum chamber with base pressure in the low 10-7 Pa (10-9 Torr) range and a very low leak up rate of 5×10-6 Pa/min (3.5×10-5 mTorr/min). The barrier process is optimized for a critical current density of 100 A/cm2, and all resistors are fabricated from palladium with a sheet resistivity of 1 Ω/sq. A charge dissipative dielectric layer is used in order to reduce the probability of damage caused by electrostatic charge build-up and discharge. The trilayer films are wet etched, while the subsequent metal and dielectric films are patterned using fluorine-based reactive ion etch, Ar ion milling, or lift-off techniques. This process is currently being used to fabricate dc SQUIDs for various instrumentation applications, integrated SQUID magnetometers and planar gradiometers, and single tunnel junction detectors.