Skip to Main Content
An approach combining 74Ge+ ion implantation with a high dose of 7×1016/cm2 at 77 K with subsequent annealing at 1100°C for 2 hours has been used to prepare thin strained Si films on Si substrates. It is demonstrated by RBS analysis that Ge ions partly enter into the Si host lattice sites, which leads to the formation of a buried SiGe alloy layer, and Ge profile broadening during annealing is availably restricted by low temperature implantation. TEM observation reveals that the formation of surface defects above the SiGe alloy layer, which occur during annealing below 800°C, is effectively inhibited by annealing directly at a temperature as high as 1100°C and some dislocation loops form only under the buried SiGe alloy layers. The existence of tensile stress of about 1.4×109 N/m2 in the top silicon is verified by Raman measurements.
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on (Volume:3 )
Date of Conference: 18-21 Oct. 2004