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A test implementation approach for VLSI testable design

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3 Author(s)
Jun Du ; Beijing Microelectron. Technol. Inst., China ; Yuanfu Zhao ; Lixin Yu

A test implementation approach for VLSI testable design, with functional testing interacting on structural testing, is presented. Compared with a simple test combination combining functional testing and structural testing, the test implementation approach can reach a precise calculation of the total fault coverage to achieve a reliable test evaluation with fewer redundant test vectors to reduce the time of testing. The features of the test implementation approach are described. A constructive framework of the approach as well as a precise calculation equation for final fault coverage is proposed. Then, the approach is applied in an MCU design.

Published in:

Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on  (Volume:3 )

Date of Conference:

18-21 Oct. 2004