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SRAM-based FPGA, as the hardware basis of reconfigurable computing will be a significant part of reconfigurable SoC, the next generation IC product. An effective routing algorithm for FPGA is necessary for developing a design tool for R-SoC. This paper suggests a taxonomy for presenting FPGA routing algorithms, introduces and analyzes the typical algorithms of each kind, and for the most importance, concludes a generalized model for FPGA routing, including a generalized routing flow, parameters, and cost function. Particular routing algorithms can be derived from this model.