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A fast variable-length decoder with optimized lookup tables on FPGA [MPEG applications]

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5 Author(s)
Guanghua, Chen ; Sch. of Mech. & Electron. Eng. & Autom., Shanghai Univ., China ; Ma Shiwei ; Li Min ; Cao Jialin
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A novel high performance variable-length code (VLC) decoder for MPEG applications is proposed. It has higher throughput and requires smaller memory resources by group matching and lookup table optimization. Group matching is developed to simplify matching procedure and reduce the process time. Group recombination, group decomposition and group properties are applied to optimize the lookup tables, which removes the redundant bits and reduces the implementation complexity. This decoder is implemented on FPGA and the throughput is about 55 Msymbols/s at 55 MHz clock rate.

Published in:
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on  (Volume:3 )

Date of Conference: 18-21 Oct. 2004

Page(s):
1649 - 1652 vol.3
Print ISBN:
0-7803-8511-X
INSPEC Accession Number:
8412114
Digital Object Identifier :
10.1109/ICSICT.2004.1435147
Product Type:
Conference Publications

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