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Slacked multi-chip package (MCP) has been an increasingly important approach for realizing high-density 3D packaging. To accommodate multiple chips within a standard package height with adequate integrity and reliability puts stringent demands on wafer thinning technology, as well as on assembly process technology. In this work, internal stress distribution and package warpage in MCP originated from process thermal load have been systematically investigated as functions of all structure parameters by finite element analysis (FEA) and Taguchi design of experiments (DOE). It is found that top die is the easiest to crack under thermal stress. The maximum stress in this die can be effectively relieved by increasing its thickness and/or by decreasing the thickness of die attach underneath. Shear stress at each interface depends negatively on the corresponding die attach thickness, while top-surface warpage can be controlled by mould compound thickness above top die.