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A new DSP-oriented algorithm for calculation of the square root using a nonlinear digital filter

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3 Author(s)
Mikami, N. ; Dept. of Inf. & Comput. Sci., Univ. of Ind. Technol., Sagamihara, Kanagawa, Japan ; Kobayashi, M. ; Yokoyama, Y.

A high-speed algorithm for calculating the square root is proposed. This algorithm, which can be regarded as calculation of the step response of a kind of nonlinear IIR filter, requires no divisions. Therefore, it is suitable for a VLSI digital signal processor (DSP) which has a high-speed hardware multiplier but does not usually have a high-speed hardware divider. The convergence properties of the algorithm are analyzed and used to develop a practical implementation of the procedure. It is implemented on the commercially available DSP (TM320C25) and is compared with the Newton-Raphson method. The proposed algorithm has two advantages over the Newton-Raphson method: higher execution speed and smaller calculation error

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Signal Processing, IEEE Transactions on  (Volume:40 ,  Issue: 7 )