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Scheduling refinement and memory allocation for low power system

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4 Author(s)
P. Guitton-Ouhamou ; Lab. d'Inf. Signaux et Syst. de Sophia-Antipolis, Nice Univ., France ; H. Ben Fradj ; C. Belleudy ; M. Auguin

Multimedia applications integrate more and more functionalities, and a huge capacity of memory is required; as a result power consumption increases and battery lifetime becomes a serious limitation. An other consequence is that the time to realize such systems becomes too long due to this growing complexity. In this paper, some optimizations way to decrease power is presented. It focuses on refinement steps of schedules and system memory to reduce power consumption. In this paper, we present a very promising technique to optimize the trade-off consumption/time for HW/SW co-design by applying: first the dynamic voltage/frequency scaling (DVS/DFS) technique; second an efficient method to found the best distribution of data between internal and external memories in order to decrease the global consumption.

Published in:

Microelectronics, 2004. ICM 2004 Proceedings. The 16th International Conference on

Date of Conference:

6-8 Dec. 2004