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This paper presents an experimental high-efficiency class-F power amplifier (PA) design, which integrates Rhodes's efficient low-pass matching network topology with the charge conservative, robust, and accurate WREN/COBRA nonlinear pseudomorphic high electron-mobility transistor (pHEMT) model for optimal drain efficiency. Large-signal model verification is undertaken where one-tone, load-pull, and wireless code-division multiple-access baseband time-domain tests are compared for simulated and experimental cases. Following a detailed theoretical analysis, a class-F matching network is proposed that suppresses the necessary load harmonics and delivers maximum drain efficiency. Utilizing the GaAs pHEMT model in computer-aided design, a microstrip matching network layout was generated and built at 2 GHz. The drain efficiency recorded for the first-pass effort was 70.5% with the use of no post-fabrication circuit tuning. Excellent agreement is also observed between the PAs simulated and measured performance, thus highlighting the advantages of an accurate device model in PA design.