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An effective BIST scheme for ROM's

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2 Author(s)
Zorian, Y. ; AT&T Bell Lab., Princeton, NJ, USA ; Ivanov, A.

A built-in self-test (BIST) scheme for ROMs that has very high fault coverage and very small likelihood of error escape (aliasing) is described. For test generation, the scheme uses the exhaustive test technique. For output data evaluation the scheme uses both time and space compactors. Linear space compaction is performed using a multiple-input linear feedback shift register (MISR). For time compaction, nonlinear compaction (count-based) enhanced by the output data modification (ODM) technique is used. Space compaction is further enhanced by using a bidirectional MISR

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Computers, IEEE Transactions on  (Volume:41 ,  Issue: 5 )