By Topic

A 72-mW CMOS 802.11a direct conversion front-end with 3.5-dB NF and 200-kHz 1/f noise corner

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Valla, M. ; STMicroelectronics, Pavia, Italy ; Montagna, G. ; Castello, R. ; Tonietto, R.
more authors

A direct conversion 802.11a receiver front-end including a synthesizer with quadrature VCO has been integrated in a 0.13-μm CMOS process. The chip has an active area of 1.8 mm2 with the entire RF portion operated from 1.2 V and the low frequency portion operated from 2.5 V. Its key features are a current driven passive mixer with a low impedance load that achieves a low 1/f noise corner and an high I-Q accuracy quadrature VCO. Measured noise figure is 3.5 dB with an 1/f noise corner of 200 kHz, and an IIP3 of -2 dBm. The synthesizer DSB phase noise integrated over a 10 MHz band is less than -36 dBc while its I-Q phase unbalance is below 1 degree.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:40 ,  Issue: 4 )