Referenced Items are not available for this document.
A direct conversion 802.11a receiver front-end including a synthesizer with quadrature VCO has been integrated in a 0.13-μm CMOS process. The chip has an active area of 1.8 mm2 with the entire RF portion operated from 1.2 V and the low frequency portion operated from 2.5 V. Its key features are a current driven passive mixer with a low impedance load that achieves a low 1/f noise corner and an high I-Q accuracy quadrature VCO. Measured noise figure is 3.5 dB with an 1/f noise corner of 200 kHz, and an IIP3 of -2 dBm. The synthesizer DSB phase noise integrated over a 10 MHz band is less than -36 dBc while its I-Q phase unbalance is below 1 degree.
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:40
,
Issue:
4
)
Date of Publication: April 2005
- Page(s):
- 970 - 977
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 8387233
- Digital Object Identifier :
- 10.1109/JSSC.2004.842847
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 25 April 2005
- Issue Date :
- April 2005
- Sponsored by :
- IEEE Solid-State Circuits Society
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
