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A low-power and compact CDMA matched filter based on switched-current technology

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3 Author(s)
T. Yamasaki ; Dept. of Frontier Informatics, Univ. of Tokyo, Japan ; T. Nakayama ; T. Shibata

A low-power and compact code-division multiple-access (CDMA) matched filter has been developed using the switched-current technology. On-chip V-I and I-V converters featuring moderate linear characteristics have been developed for the chip. The low-power operation has been achieved by the sub-block architecture, which reduced the current flowing in current-memory cells. A low-power clock-on-demand shift register has also been developed. The 256-chip matched filter fabricated in a 0.35-μm technology demonstrated the power dissipation of 1.95 mW at the chip rate of 8 Mchip/s under 2-V power supply. The chip occupies the area of 0.54 mm2.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:40 ,  Issue: 4 )