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This paper examines the controversy between two approaches to inductance extraction: loop versus partial treatments for integrated circuit applications. We advocate the first one, and explicitly show that the alternative demands monopole-like magnetic configurations as well as dense inductance matrices. We argue that the uncertainties in the loop inductance treatment associated with possibly unknown return paths are in fact negligible for frequencies where inductance effects are important. Within the loop formulation, we develop an efficient way of computing mutual inductances between loops in terms of the field generated by a magnetic dipole. We derive easily computable analytical formulas. On numerical simulations, this dipole approximation (DA) shows good accuracy when compared to FastHenry, down to distances smaller than 30 μm for 90-nm lithography. The DA leads naturally to selection rules for discarding the coupling for certain geometrical configurations, an experimentally verifiable prediction.