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Multifunction subthreshold gate used for a low power full adder

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4 Author(s)
Aunet, S. ; Department of Informatics, University of Oslo, Postbox 1080 Blindern, N-0316 Oslo, Norway ; Oelmann, B. ; Lande, T.S. ; Berg, Y.

This paper presents a full-adder based on realtime reconfigurable CMOS perceptron circuits operating in subthreshold. The Perceptron is based on three output wired inverters that is configured through well biasing. The full-adder is demonstrated by simulations for a 0.12 um CMOS process. Functionality is proven for 200-400 mV power supply voltages. Minimum power consumption is 7.4 nW and power-delay-product 7.8 fJ, for a Vdd of 200 mV, according to simulations.

Published in:

Norchip Conference, 2004. Proceedings

Date of Conference:

8-9 Nov. 2004