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High performance CMOS converter design in TSMC 0.18-μm process

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3 Author(s)
Islam, N. ; Dept. of Electr. & Comput. Eng., Tennessee Univ., Knoxville, TN, USA ; Islam, S.K. ; Huq, H.F.

This paper demonstrates the low voltage operation of a double balanced Gilbert mixer fabricated in 0.18-μm standard/bulk CMOS process. A tuned load was used to ensure the rail-to-rail swing and a source degeneration resistor was used to improve the linearity. As an upconverter, the mixer demonstrates 1.65 dB of conversion gain at an RF frequency of 1.9 GHz with an applied local oscillator power of -1.2 dBm. The noise figure of the designed mixer is 17.2 dB, and the third-order input-referred intercept point (IIP3) is 20.45 dBm.

Published in:

SoutheastCon, 2005. Proceedings. IEEE

Date of Conference:

8-10 April 2005

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