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Techniques for measuring very low tunneling currents are critical for studying gate dielectric properties in MOSFETs, especially charge-loss mechanisms in nonvolatile memory (NVM) devices. Being able to measure stress-induced leakage current (SILC) at the floating gate operating conditions can be used to accurately extract the retention lifetime of floating gate memories. In this work, we utilize a floating-gate integrator technique (capable of resolving currents as low as 3×10-22 A) to study the effect of SILC on the charge-retention of logic NVM cells with a 70 Å tunnel oxide, with up to 300 k endurance cycles. The relation between SILC and Vox is used to extrapolate the retention lifetime of the memory cell. A conservative estimate of over 10 years retention is found for logic NVM with 70 Å gate tunnel oxides.
Date of Conference: 18-21 Oct. 2004