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Optimising data layout for delay-line memory

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2 Author(s)
J. Crowcroft ; Comput. Lab., Univ. of Cambridge, UK ; T. Deegan

All-optical programmable logic must use recirculating delay lines for storage. Two approaches to minimising the latency inherent in delay-line-based systems by treating the layout of code and data in memory as an integer linear programming (ILP) problem are presented. It is shown that, although this approach can generate optimal code for small routines, it does not scale well enough to compile useful programs.

Published in:

Electronics Letters  (Volume:41 ,  Issue: 6 )